1. Field of the Invention
The present invention relates to a method for producing a silicon single crystal wafer in high productivity wherein a size of crystal defect called grown-in defect inside the crystal is decreased by doping nitrogen when pulling a silicon single crystal by a Czochralski method (hereinafter referred to as "CZ method"), and crystal defects on the surface of wafer are eliminated by subjecting the wafer to a high temperature heat treatment with a rapid heating/rapid cooling apparatus, and the silicon single crystal wafer produced by the method.
2. Description of the Related Art
As a wafer for fabrication of a device such as a semiconductor integrated circuit, a silicon single crystal wafer grown by a Czochralski method (CZ method) is mainly used. When crystal defects are present in such a silicon single crystal wafer, pattern failure is caused when a semiconductor device is fabricated. Particularly, the pattern width of devices which is highly integrated in recent years is very fine as 0.35 .mu.m or less. Accordingly, even small crystal defects as 0.1 .mu.m may cause defects such as pattern failures in the device, and may remarkably lower a yield and characteristics of the device. Accordingly, the crystal defects in the silicon single crystal wafer have to be decreased as thoroughly as possible.
Recently, it has been reported that the above-mentioned crystal defects called grown-in defect incorporated during growth of the crystal are found in the silicon single crystal grown by CZ method by various measurement methods. For example, these crystal defects in a single crystal grown at a general growth rate in commercial production (for example, about 1 mm/min or more) can be detected as a pit by subjecting the surface of the crystal to preferential etching (Secco etching) with Secco solution (a mixture of K.sub.2 Cr.sub.2 O.sub.7, hydrofluoric acid and water) (See Japanese Patent Application Laid-open (kokai) No.4-192345).
The main cause of generation of the pit is considered to be a cluster of vacancies which is aggregated in manufacture of single crystal or an oxide precipitate which is an agglomerate of oxygen atoms incorporated from a quartz crucible. When these crystal defects are present in the surface portion (0 to 5 .mu.m) in which a device is formed, they degrade characteristics of the device. Accordingly, various methods for reducing these crystal defects have been studied.
For example, it is known that a density of the above-mentioned cluster of vacancies can be lowered by decreasing a growth rate of the crystal extremely (for example, to 0.4 mm/min or less) (See Japanese Patent Application Laid-open (kokai) No.2-267195). However, adopting this method there is generated a crystal defect which is considered to be a dislocation loop formed as a result of new aggregation of excess interstitial silicon atoms, which may degrade characteristics of a device significantly. Accordingly, the problem cannot be solved by the method. Furthermore, productivity of the single crystal and cost performance are extremely decreased in the method, since the growth rate of the crystal is decreased from about 1.0 mm/min as usual or more to 0.4 mm/min or less.
In order to reduce crystal defects due to oxide precipitate in the surface portion of the wafer, there is a method of dissolving and eliminating oxide precipitates by subjecting the wafer to a heat treatment at a high temperature as 1100.degree. C. or more to out-diffuse oxygen in the crystal. However, a heat treatment has to be conducted for a long time as 4 hours or more in the method, and thus disadvantageous from the point of productivity and cost performance. Furthermore, the intended purpose or advantages cannot be achieved by the method in many cases, since it takes long time to increase or decrease a temperature of the wafer, and oxide precipitates are formed in the device fabricating layer when increasing or decreasing temperature.